VNR VJIET
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Page 2 of 7
Title
Authors/Editors
Publisher
Type
Copies
Implementation of Low Hardware 3-weight Pattern Generation for VLSI Testing
Year
:
2016
Series
:
Guided by JLV Ramanakumari
Call No
:
T63
Sushma Sindhuja Kashyap
VNR
Thesis
1
Patent Assistance Using H&MS Accessmeter with voice indicating Robot
Year
:
2016
Call No
:
T62
Rakesh Prasanth
VNR
Thesis
1
Generation of Test Data for OOP Source Code
Year
:
2016
Call No
:
T16
Mrudula, Hari, Venkat
Thesis
1
SENSOR NODE DESIGN USING NS2
Year
:
2016
Series
:
Guided by G Sahithya
Call No
:
T65
Rohith Sahari
VNR
Thesis
1
Multi-Level Biometric Security System
Year
:
2016
Call No
:
T64
Akhil Sanjay Aditya
VNR
Thesis
1
Data Analysis using R On Stock Market
Year
:
2016
Series
:
Guided by Dr N Sandhya
Call No
:
T39
Varunkumar Pranavi Ramu
VNR
Thesis
1
Corner Aggregation Addition and deletion of Secondary Cell
Year
:
2016
Series
:
Guided by LV Rajanikumari
Call No
:
T43
Keerthi Teja Krishna Mohan
VNR
Thesis
1
Monotoring Online Tests through Data Visualization
Year
:
2016
Series
:
Guyided by Nagaraju G
Call No
:
T46
Nagavardhini Jyotsna
VNR
Thesis
1
Propagation Effects due to Atmospheric Gases and Clouds
Year
:
2016
Series
:
Guided by Kalyana Srinivas
Call No
:
T61
Nandini Srividya Sindhura
VNR
Thesis
1
Eye Controlled Wheel Chair
Year
:
2016
Series
:
Guided by Dr V Padmaja
Call No
:
T58
Divya Saiprashanthi Nihar
VNR
Thesis
1
1
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4
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